Lattice Semiconductor CorporationLattice launched the Mach-N2 secure control FPGA family with post-quantum security and higher logic density, a new product development.

Lattice Semiconductor announced the Lattice Mach-N2 FPGA family, extending its secure control FPGA leadership with devices built for system control and security in modern infrastructure. The family is built on the Lattice Nexus 2 small FPGA platform and combines integrated flash, a hardware Root of Trust, and CNSA 2.0-compliant post-quantum cryptography with crypto agility. Mach-N2 delivers up to 2X greater logic density for advanced system control functions, enhanced SERDES bandwidth for direct connectivity to modern System on Chips and processors, and up to 16 Gbps SERDES with PCIe 4.0 and 10G Ethernet. Its security suite includes ML-DSA, LMS, and XMSS for authentication, ML-KEM for key exchange, PUF-derived device identity with DICE and SPDM attestation, and classical cryptography including AES-256-GCM, ECC 521-bit, and RSA 4096-bit APIs. On-chip non-volatile flash blocks external access to the configuration bitstream and User Flash Memory, and a 220k system logic cell device fully configures in under 30 milliseconds, with up to three stored configuration images for fault recovery. Esam Elashmawi, Chief Strategy and Marketing Officer, said Mach-N2 represents a significant step forward in logic density and bandwidth while adding the most complete post-quantum security suite in its class for long-lifecycle systems.
Lattice Semiconductor CorporationLattice launched the Mach-N2 secure control FPGA family with post-quantum security and higher logic density, a new product development.