Galaxy Digital Pledges $5 Million to Boost Bitcoin's Quantum Resistance

01 Quantum Inc reported cash usage of $450,000 for the quarter despite significantly ramped-up research and development and marketing spending, leaving it with approximately $2.5 million in cash and zero debt. Recurring revenue from partner royalties, including Hitachi, has begun accumulating and was described as growing slowly but surely, while the absence of one-time engineering fees that were collected in previous quarters weighed on revenue comparisons. The company received $22.5 million in qONE tokens plus a cash development fee for the qLABS Foundation quantum-safe crypto vault, and Chief Executive Andrew Cheung pegged the annual recurring revenue opportunity for its IronCAP XMail product at $2.6 billion, based on 10% of roughly 730 million business email addresses at $3 per month. Cheung said the AI marketplace is expected around the second quarter of 2027, and he cited an independent Carleton University evaluation confirming that the Quantum AI Wrapper performs AI inference in encrypted form at acceptable efficiency. He also said qLABS Foundation is preparing a Mythos Challenge that will load approximately $100,000 worth of qONE tokens into the qVAULT, publish the private key, and invite crypto hackers to breach it over 30 days.

Lattice Semiconductor announced the Lattice Mach-N2 FPGA family, extending its secure control FPGA leadership with devices built for system control and security in modern infrastructure. The family is built on the Lattice Nexus 2 small FPGA platform and combines integrated flash, a hardware Root of Trust, and CNSA 2.0-compliant post-quantum cryptography with crypto agility. Mach-N2 delivers up to 2X greater logic density for advanced system control functions, enhanced SERDES bandwidth for direct connectivity to modern System on Chips and processors, and up to 16 Gbps SERDES with PCIe 4.0 and 10G Ethernet. Its security suite includes ML-DSA, LMS, and XMSS for authentication, ML-KEM for key exchange, PUF-derived device identity with DICE and SPDM attestation, and classical cryptography including AES-256-GCM, ECC 521-bit, and RSA 4096-bit APIs. On-chip non-volatile flash blocks external access to the configuration bitstream and User Flash Memory, and a 220k system logic cell device fully configures in under 30 milliseconds, with up to three stored configuration images for fault recovery. Esam Elashmawi, Chief Strategy and Marketing Officer, said Mach-N2 represents a significant step forward in logic density and bandwidth while adding the most complete post-quantum security suite in its class for long-lifecycle systems.